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专利名称：MICROPROCESSOR WITH INTEGRATED
HIGH SPEED MEMORY
发明人：Sophie WILSON,John E. Redford申请号：US12824947申请日：20100628
公开号：US20110040939A1公开日：20110217
专利附图：
摘要：The present invention relates to the field of (micro)computer design andarchitecture, and in particular to microarchitecture associated with moving data valuesbetween a (micro)processor and memory components. Particularly, the present invention
relates to a computer system with an processor architecture in which register addressesare generated with more than one execution channel controlled by one central
processing unit with at least one load/store unit for loading and storing data objects, andat least one cache memory associated to the processor holding data objects accessed bythe processor, wherein said processor's load/store unit contains a high speed memorydirectly interfacing said load/store unit to the cache. The present invention improves theof architectures with dual ported microprocessor implementations comprising twoexecution pipelines capable of two load/store data transactions per cycle. By including acache memory inside the load/store unit, the processor is directly interfaced from itsload/store units to the caches. Thus, the present invention accelerates data accesses andtransactions from and to the load/store units of the processor and the data cachememory.
申请人：Sophie WILSON,John E. Redford
地址：Cambridge GB,Cambridge GB
国籍：GB,GB
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