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专利名称：BIAS CIRCUIT AND METHOD FOR
CONTROLLING BIAS CIRCUIT
发明人：ARAI, TOMOYUKI,KUDO, MASAHIRO申请号：EP07828024申请日：20071116公开号：EP2216902A4公开日：20140326
摘要：A bias circuit for applying a bias voltage to a nonlinear amplification circuit,including a constant-current source; and a first, second, third, and fourth transistors,wherein a current mirror circuit is configured by the first transistor and the secondtransistor, a drain and gate of the third transistor and a gate of the fourth transistor areconnected, the first transistor and the third transistor are cascade connected, the secondtransistor and the fourth transistor are cascade connected, and the bias voltage isoutputted from the drain of the second transistor, gate lengths and gate widths of thefirst and second transistor are the same, gate lengths of the first to fourth transistor arethe same, and gate lengths and gate widths of the first, second, third, and fourthtransistor are configured so that k 4 -0.5 - k 3 -0.5 is approximately 1, where k 3 standsfor a ratio of a gate width of the third transistor to the gate width of the first transistorand k 4 stands for a ratio of a gate width of the fourth transistor to the gate width of thefirst transistor.
申请人：FUJITSU LIMITED
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