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专利名称：METHODS OF FORMING GATE STRUCTURES
FOR TRANSISTOR DEVICES FOR CMOSAPPLICATIONS AND THE RESULTINGPRODUCTS
发明人：Zhendong Hong,Susie Tzeng,Amol
Joshi,Ashish Bodke,Divya Pisharoty,UshaRaghuram,Olov Karlsson,Kisik Choi,SalilMujumdar,Paul R. Besser,Jinping Liu,HoonKim
申请号：US14017485申请日：20130904
公开号：US20150061027A1公开日：20150305
专利附图：
摘要：One method for forming replacement gate structures for NMOS and PMOStransistors includes performing an etching process to remove a sacrificial gate structurefor the NMOS and PMOS transistors to thereby define NMOS and PMOS gate cavities,depositing a gate insulation layer in the gate cavities, depositing a first metal layer on thegate insulation layer in the gate cavities, performing at least one process operation toform (1) an NMOS metal silicide material above the first metal layer within the NMOSgate cavity, the NMOS metal silicide material having a first amount of atomic silicon, and(2) a PMOS metal silicide material above the first metal layer within the PMOS gate cavity,the PMOS metal silicide material having a second amount of atomic silicon, and whereinthe first and second amounts of atomic silicon are different, and forming gate cap layerswithin the NMOS and PMOS gate cavities.
申请人：GLOBALFOUNDRIES Inc.
地址：Grand Cayman KY
国籍：KY
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