LTC3407AIDD-2-PBF资料

LTC3407A-2Dual Synchronous 800mA,2.25MHz Step-DownDC/DC RegulatorFEATURES■■■■■■■■■■■■■■DESCRIPTIOUAPPLICATIOS■■■■High Efficiency: Up to 95%Low Ripple (<35mVPK-PK) Burst Mode Operation;IQ = 40μA2.25MHz Constant Frequency OperationNo Schottky Diodes RequiredLow RDS(ON) Internal Switches: 0.35ΩCurrent Mode Operation for Excellent Lineand Load Transient ResponseShort-Circuit ProtectedLow Dropout Operation: 100% Duty CycleUltralow Shutdown Current: IQ <1μAOutput Voltages from 5V down to 0.6VPower-On Reset OutputExternally Synchronizable OscillatorOptional External Soft-StartSmall Thermally Enhanced MSOP and 3mm × 3mmDFN PackagesThe LTC®3407A-2 is a dual, constant frequency, synchro-nous step-down DC/DC converter. Intended for low powerapplications, it operates from a 2.5V to 5.5V input voltagerange and has a constant 2.25MHz switching frequency,enabling the use of tiny, low cost capacitors and inductors1mm or less in height. Each output voltage is adjustablefrom 0.6V to 5V. Internal synchronous 0.35Ω, 1A powerswitches provide high efficiency without the need forexternal Schottky diodes.A user selectable mode input is provided to allow the userto trade-off ripple noise for low power efficiency. BurstMode® operation provides the highest efficiency at lightloads, while Pulse Skip Mode provides the lowest ripplenoise at light loads.To further maximize battery life, the P-channel MOSFETsare turned on continuously in dropout (100% duty cycle),and both channels draw a total quiescent current of only40μA. In shutdown, the device draws <1μA., LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 98466, 6611131.PDAs/Palmtop PCsDigital CamerasCellular PhonesWireless and DSL ModemsTYPICAL APPLICATIOVIN = 2.5VTO 5.5V10μF1mm High 2.5V/1.8V at 800mA Step-Down Regulators10090RUN/SS2MODE/SYNCLTC3407A-2VOUT2 = 2.5VAT 800mA2.2μHSW222pFSW122pF2.2μHVOUT1 = 1.8VAT 800mAVINRUN/SS1POR100kRESETEFFICIENCY (%)887k10μFVFB2280kGNDVFB1442k887k10μF3407A2 TA01UEfficiency/Power Loss Curve2.5V1.8V0.11807060504030201001VIN = 3.3VBurst Mode OPERATIONNO LOAD ON OTHER CHANNEL10100LOAD CURRENT (mA)0.000110003407A2 TA02UPOWER LOSS (W)0.010.0013407a2f

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LTC3407A-2ABSOLUTE AXIU RATIGS(Note 1)VIN Voltage..................................................–0.3V to 6VVFB1, VFB2 Voltages...................................–0.3V to 1.5VRUN/SS1, RUN/SS2 Voltages.....................–0.3V to VINMODE/SYNC Voltage..................................–0.3V to VINSW1, SW2 Voltages.......................–0.3V to VIN + 0.3VPOR Voltage................................................–0.3V to 6VPI CO FIGURATIOTOP VIEWVFB1RUN/SS1VINSW1GND123451110VFB29RUN/SS28POR7SW26MODE/SYNCDD PACKAGE10-LEAD (3mm × 3mm) PLASTIC DFNTJMAX = 125°C, θJA = 45°C/W, θJC = 10°C/WEXPOSED PAD (PIN 11) IS PGND, MUST BE CONNECTED TO GNDWUORDER IFORATIOLEAD FREE FINISHLTC3407AEDD-2#PBFLTC3407AEMSE-2#PBFLTC3407AIDD-2#PBFLTC3407AIMSE-2#PBFLEAD BASED FINISHLTC3407AEDD-2LTC3407AEMSE-2LTC3407AIDD-2LTC3407AIMSE-2TAPE AND REELLTC3407AEDD-2#TRPBFLTC3407AEMSE-2#TRPBFLTC3407AIDD-2#TRPBFLTC3407AIMSE-2#TRPBFTAPE AND REELLTC3407AEDD-2#TRLTC3407AEMSE-2#TRLTC3407AIDD-2#TRLTC3407AIMSE-2#TRPART MARKING*LDDHLTDDJLDDHLTDDJPART MARKING*LDDHLTDDJLDDHLTDDJPACKAGE DESCRIPTION10-Lead (3mm × 3mm) Plastic DFN10-Lead Plastic MSOP10-Lead (3mm × 3mm) Plastic DFN10-Lead Plastic MSOPPACKAGE DESCRIPTION10-Lead (3mm × 3mm) Plastic DFN10-Lead Plastic MSOP10-Lead (3mm × 3mm) Plastic DFN10-Lead Plastic MSOPTEMPERATURE RANGE–40°C to 85°C–40°C to 85°C–40°C to 125°C–40°C to 125°CTEMPERATURE RANGE–40°C to 85°C–40°C to 85°C–40°C to 125°C–40°C to 125°CUConsult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.For more information on lead free part marking, go to: http://www.linear.com/leadfree/For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/2

UWWUWOperating Temperature Range (Note 2)LTC3407AE-2.....................................–40°C to 85°CLTC3407AI-2....................................–40°C to 125°CJunction Temperature (Note 5).............................125°CStorage Temperature Range.................–65°C to 150°CLead Temperature (Soldering, 10 sec)LTC3407AEMSE-2............................................300°CLTC3407AIMSE-2.............................................300°CUUTOP VIEW

VFB1RUN/SS1

VINSW1GND

12345

109876

VFB2

RUN/SS2PORSW2

MODE/SYNC

11

MSE PACKAGE

10-LEAD PLASTIC MSOP

TJMAX = 125°C, θJA = 45°C/W, θJC = 10°C/WEXPOSED PAD (PIN 11) IS PGND, MUST BE CONNECTED TO GND3407a2f

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LTC3407A-2The ● denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, unless otherwise specified. (Note 2)SYMBOLVINIFBVFBΔVLINE REGΔVLOAD REGISPARAMETEROperating Voltage RangeFeedback Pin Input CurrentFeedback Voltage (Note 3)Reference Voltage Line RegulationOutput Voltage Load RegulationInput DC Supply CurrentActive ModeSleep ModeShutdownOscillator FrequencySynchronization FrequencyPeak Switch Current LimitTop Switch On-ResistanceBottom Switch On-ResistanceSwitch Leakage CurrentPower-On Reset ThresholdPower-On Reset On-ResistancePower-On Reset DelayVRUNIRUNVMODERUN/SS Threshold LowRUN/SS Threshold HighRUN/SS Leakage CurrentMODE Threshold LowMODE Threshold HighNote 1: Stresses beyond those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. Exposure to any AbsoluteMaximum Rating condition for extended periods may affect devicereliability and lifetime.Note 2: The LTC3407AE-2 is guaranteed to meet specified performancefrom 0°C to 85°C. Specifications over the –40°C and 85°C operatingtemperature range are assured by design, characterization and correlationwith statistical process controls. The LTC3407AI-2 is guaranteed over thefull –40°C to 125°C operating temperature range.●●●ELECTRICAL CHARACTERISTICSCONDITIONS●●MIN2.50.5880.585TYPMAX5.530UNITSVnAVV%/V%0°C ≤ TA ≤ 85°C–40°C ≤ TA ≤ 125°C (Note 2)VIN = 2.5V to 5.5V (Note 3)MODE/SYNC = 0V (Note 3)(Note 4)VFB1 = VFB2 = 0.5VVFB1 = VFB2 = 0.63V, MODE/SYNC = 3.6VRUN = 0V, VIN = 5.5V, MODE/SYNC = 0VVFBX = 0.6VVIN = 3V, VFBX = 0.5V, Duty Cycle <35%(Note 6)(Note 6)VIN = 5V, VRUN = 0V, VFBX = 0VVFBX Ramping Up, MODE/SYNC = 0VVFBX Ramping Down, MODE/SYNC = 0V●0.60.60.30.5700400.10.6120.6120.59506012.71.60.450.451μAμAμAMHzMHzAΩΩμA%%fOSCfSYNCILIMRDS(ON)ISW(LKG)POR●1.812.252.251.20.350.300.018.5–8.510065,5362001.5210.5VINΩCyclesVVμAVV0.310.010 VIN – 0.5Note 3: The LTC3407A-2 is tested in a proprietary test mode that connectsVFB to the output of the error amplifier.Note 4: Dynamic supply current is higher due to the internal gate chargebeing delivered at the switching frequency.Note 5: TJ is calculated from the ambient TA and power dissipation PDaccording to the following formula: TJ = TA + (PD • θJA).Note 6: The DFN switch on-resistance is guaranteed by correlation towafer level measurements.3407a2f

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LTC3407A-2TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise specified.Burst Mode OperationSW5V/DIVVOUT50mV/DIVIL200mA/DIVVIN = 3.6VVOUT = 1.8VILOAD = 50mACIRCUIT OF FIGURE 3Load StepVOUT1200mV/DIVVOUT2100mV/DIVIL

500mA/DIV

VIN2V/DIVILOAD500mA/DIV

VIN = 3.6VVOUT = 1.8V

ILOAD = 50mA TO 600mACIRCUIT OF FIGURE 3

Efficiency vs Input Voltage1009080100mA800mA1mA10mA605040302010VOUT = 1.8VCIRCUIT OF FIGURE 304325INPUT VOLTAGE (V)FREQUENCY (MHz)EFFICIENCY (%)70FREQUENCY DEVIATION (%)4

UW2μs/DIV20μs/DIV

63407A2 G04Pulse Skipping ModeSW5V/DIVVOUT10mV/DIVIL100mA/DIV3407A2 G01VIN = 3.6VVOUT = 1.8VILOAD = 50mACIRCUIT OF FIGURE 31μs/DIV3407A2 G02Soft StartVOUT11V/DIVIL500mA/DIVVIN = 3.6VVOUT = 1.8VILOAD = 500mACIRCUIT OF FIGURE 43407A2 G03

1ms/DIV3407A2 G16Oscillator Frequency vsTemperature2.5VIN = 3.6V10820–2–4–6–82.0–50–255025750TEMPERATURE (°C)100125–10Oscillator Frequency vs SupplyVoltage2.42.32.22.1234SUPPLY VOLTAGE (V)563407A2 G063407A2 G053407a2f

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LTC3407A-2TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise specified.Reference Voltage vsTemperature0.6150.610VIN = 3.6V500450400350300250200SYNCHRONOUSSWITCHMAINSWITCHREFERENCE VOLTAGE (V)RDS(ON) (mΩ)RDS(ON) (mΩ)0.6050.6000.5950.5900.585–50–255025750TEMPERATURE (°C)Efficiency vs Load Current100908070EFFICIENCY (%)6050403020

10VOUT = 2.5V Burst Mode OPERATIONCIRCUIT OF FIGURE 30110100

LOAD CURRENT (mA)

EFFICIENCY (%)2.7V4.2V3.3V1009080

VOUT ERROR(%)Efficiency vs Load Current100908070EFFICIENCY (%)60504030201001

VOUT = 1.2V Burst Mode OPERATION10100LOAD CURRENT (mA)

1000

3407A2 G13

3.3V2.7V4.2VEFFICIENCY (%)60504030201001VOUT = 1.5V Burst Mode OPERATION10100LOAD CURRENT (mA)10003407A2 G14VOUT ERROR (%)UW1003407A2 G073407A2 G10

RDS(ON) vs Input Voltage5505004504003503002502001501234VIN (V)567RDS(ON) vs TemperatureVIN = 2.7VVIN = 4.2VVIN = 3.6V125100–50–25MAIN SWITCHSYNCHRONOUS SWITCH0255075100125150TEMPERATURE (°C)3407A2 G093407A2 G08Efficiency vs Load Current4

Burst Mode OPERATION32

Load Regulation706050403020

10VIN = 3.6V, VOUT = 1.8VNO LOAD ON OTHER CHANNEL0110100

LOAD CURRENT (mA)

PULSE SKIP MODE1Burst Mode OPERATION0–1–2–3–4

VIN = 3.6V, VOUT = 1.8VNO LOAD ON OTHER CHANNEL1

10100LOAD CURRENT (mA)

1000

3407A2 G12

PULSE SKIP MODE10001000

3407A2 G11

Efficiency vs Load Current1009080704.2V3.3V2.7VLine Regulation0.50.40.30.20.10–0.1–0.2–0.3–0.4–0.5234VIN (V)563407A2 G15VOUT = 1.8V IOUT = 200mA3407a2f

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LTC3407A-2PI FUCTIOSVFB1 (Pin 1): Output Feedback. Receives the feedbackvoltage from the external resistive divider across theoutput. Nominal voltage for this pin is 0.6V.RUN/SS1 (Pin 2): Regulator 1 Enable and Soft-Start Input.Forcing this pin to VIN enables regulator 1, while forcing itto GND causes regulator 1 to shut down. Connect externalRC-network with desired time-constant to enable soft-start feature. This pin must be driven; do not float.VIN (Pin 3): Main Power Supply. Must be closely decoupledto GND.SW1 (Pin 4): Regulator 1 Switch Node Connection to theInductor. This pin swings from VIN to GND.GND (Pin 5): Main Ground. Connect to the (–) terminal ofCOUT, and (–) terminal of CIN.MODE/SYNC (Pin 6): Combination Mode Selection andOscillator Synchronization. This pin controls the operationof the device. When tied to VIN or GND, Burst Modeoperation or pulse skipping mode is selected, respec-tively. Do not float this pin. The oscillation frequency canbe synchronized to an external oscillator applied to this pinand pulse skipping mode is automatically selected.SW2 (Pin 7): Regulator 2 Switch Node Connection to theInductor. This pin swings from VIN to GND.POR (Pin 8): Power-On Reset. This common-drain logicoutput is pulled to GND when the output voltage is notwithin ±8.5% of regulation and goes high after 216 clockcycles when both channels are within regulation.RUN/SS2 (Pin 9): Regulator 2 Enable and Soft-Start Input.Forcing this pin to VIN enables regulator 2, while forcing itto GND causes regulator 2 to shut down. Connect externalRC-Network with desired time-constant to enable soft-start feature. This pin must be driven; do not float.VFB2 (Pin 10): Output Feedback. Receives the feedbackvoltage from the external resistive divider across theoutput. Nominal voltage for this pin is 0.6V.Exposed Pad (GND) (Pin 11): Power Ground. Connect tothe (–) terminal of COUT, and (–) terminal of CIN. Must besoldered to electrical ground on PCB.BLOCK DIAGRAMODE/SYNC6REGULATOR 1BURSTCLAMPSLOPECOMP0.6VVINVFB110.55V0.65V–IRCMPSHUTDOWNPGOOD1RUN/SS120.6V REFRUN/SS29OSCOSCPGOOD2REGULATOR 2 (IDENTICAL TO REGULATOR 1)VFB210PORCOUNTER6

–+WUUU+EA–ITH0.65VENSLEEP–ICOMP+5Ω––UVDET+BURSTSQRSLATCHRQUV++OVDETSWITCHINGLOGICANDBLANKINGCIRCUITANTISHOOT-THRU4SW1OV11GNDVIN3VIN8POR5GND7SW23407A2 BD3407a2f

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LTC3407A-2UOPERATIOThe LTC3407A-2 uses a constant frequency, current modearchitecture. The operating frequency is set at 2.25MHzand can be synchronized to an external oscillator. Bothchannels share the same clock and run in-phase. To suita variety of applications, the selectable MODE/SYNC pinallows the user to trade-off noise for efficiency.The output voltage is set by an external divider returned tothe VFB pins. An error amplifier compares the dividedoutput voltage with a reference voltage of 0.6V and adjuststhe peak inductor current accordingly. Overvoltage andundervoltage comparators will pull the POR output low ifthe output voltage is not within ±8.5%. The POR outputwill go high after 65,536 clock cycles (about 29ms in pulseskipping mode) of achieving regulation.Main Control LoopDuring normal operation, the top power switch (P-channelMOSFET) is turned on at the beginning of a clock cyclewhen the VFB voltage is below the reference voltage. Thecurrent into the inductor and the load increases until thecurrent limit is reached. The switch turns off and energystored in the inductor flows through the bottom switch (N-channel MOSFET) into the load until the next clock cycle.The peak inductor current is controlled by the internallycompensated ITH voltage, which is the output of the erroramplifier.This amplifier compares the VFB pin to the 0.6Vreference. When the load current increases, the VFB volt-age decreases slightly below the reference. Thisdecrease causes the error amplifier to increase the ITHvoltage until the average inductor current matches the newload current.The main control loop is shut down by pulling the RUN/SSpin to ground.Low Current OperationTwo modes are available to control the operation of theLTC3407A-2 at low currents. Both modes automaticallyswitch from continuous operation to the selected modewhen the load current is low.To optimize efficiency, the Burst Mode operation can beselected. When the load is relatively light, the LTC3407A-2automatically switches into Burst Mode operation in whichthe PMOS switch operates intermittently based on loaddemand with a fixed peak inductor current. By runningcycles periodically, the switching losses which are domi-nated by the gate charge losses of the power MOSFETs areminimized. The main control loop is interrupted when theoutput voltage reaches the desired regulated value. Avoltage comparator trips when ITH is below 0.65V, shut-ting off the switch and reducing the power. The outputcapacitor and the inductor supply the power to the loaduntil ITH exceeds 0.65V, turning on the switch and the maincontrol loop which starts another cycle.For lower ripple noise at low currents, the pulse skippingmode can be used. In this mode, the LTC3407A-2 contin-ues to switch at a constant frequency down to very lowcurrents, where it will begin skipping pulses.Dropout OperationWhen the input supply voltage decreases toward theoutput voltage, the duty cycle increases to 100% which isthe dropout condition. In dropout, the PMOS switch isturned on continuously with the output voltage beingequal to the input voltage minus the voltage drops acrossthe internal P-channel MOSFET and the inductor.An important design consideration is that the RDS(ON) ofthe P-channel switch increases with decreasing inputsupply voltage (See Typical Performance Characteristics).Therefore, the user should calculate the power dissipationwhen the LTC3407A-2 is used at 100% duty cycle with lowinput voltage (See Thermal Considerations in the Applica-tions Information Section).Low Supply OperationThe LTC3407A-2 incorporates an undervoltage lockoutcircuit which shuts down the part when the input voltagedrops below about 1.65V to prevent unstable operation.A general LTC3407A-2 application circuit is shown inFigure1. External component selection is driven by theload requirement, and begins with the selection of theinductor L. Once the inductor is chosen, CIN and COUT canbe selected.3407a2f

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LTC3407A-2APPLICATIOS IFORATIOInductor SelectionAlthough the inductor does not influence the operatingfrequency, the inductor value has a direct effect on ripplecurrent. The inductor ripple current ΔIL decreases withhigher inductance and increases with higher VIN or VOUT: ΔIL=VOUT⎛VOUT⎞•1–fO•L⎜VIN⎟⎝⎠Accepting larger values of ΔIL allows the use of lowinductances, but results in higher output voltage ripple,greater core losses, and lower output current capability.A reasonable starting point for setting ripple current isΔIL = 0.3 • ILIM, where ILIM is the peak switch current limit.The largest ripple current ΔIL occurs at the maximuminput voltage. To guarantee that the ripple current staysbelow a specified maximum, the inductor value should bechosen according to the following equation:VL=OUTfO•ΔIL⎛VOUT⎞•⎜1–⎟V⎝IN(MAX)⎠The inductor value will also have an effect on Burst Modeoperation. The transition from low current operation be-gins when the peak inductor current falls below a level setby the burst clamp. Lower inductor values result in higherripple current which causes this transition to occur atlower load currents. This causes a dip in efficiency in theupper range of low current operation. In Burst Modeoperation, lower inductance values will cause the burstfrequency to increase.Inductor Core SelectionDifferent core materials and shapes will change the size/current and price/current relationship of an inductor.Toroid or shielded pot cores in ferrite or permalloy mate-rials are small and don’t radiate much energy, but gener-ally cost more than powdered iron core inductors withsimilar electrical characterisitics. The choice of whichstyle inductor to use often depends more on the price vssize requirements and any radiated field/EMI require-ments than on what the LTC3407A-2 requires to operate.Table 1 shows some typical surface mount inductors thatwork well in LTC3407A-2 applications.8

UInput Capacitor (CIN) SelectionIn continuous mode, the input current of the converter isa square wave with a duty cycle of approximately VOUT/VIN. To prevent large voltage transients, a low equivalentseries resistance (ESR) input capacitor sized for the maxi-mum RMS current must be used. The maximum RMScapacitor current is given by:IRMS≈IMAX

VOUT(VIN–VOUT)VIN

where the maximum average output current IMAX equalsthe peak current minus half the peak-to-peak ripple cur-rent, IMAX = ILIM – ΔIL/2.This formula has a maximum at VIN = 2VOUT, whereIRMS = IOUT/2. This simple worst-case is commonly usedto design because even significant deviations do not offermuch relief. Note that capacitor manufacturer’s ripplecurrent ratings are often based on only 2000 hours life-time. This makes it advisable to further derate the capaci-tor, or choose a capacitor rated at a higher temperaturethan required. Several capacitors may also be paralleled tomeet the size or height requirements of the design. Anadditional 0.1μF to 1μF ceramic capacitor is also recom-mended on VIN for high frequency decoupling, when notusing an all ceramic capacitor solution.Table 1. Representative Surface Mount Inductors MANU- FACTURER PART NUMBER Taiyo YudenCB2016T2R2MCB2012T2R2MCB2016T3R3M Panasonic Sumida MurataELT5KT4R7MCDRH2D18/LD MAX DCVALUECURRENT2.2μH 510mA2.2μH 530mA3.3μH 410mA4.7μH4.7μH2.2μH4.7μH4.7μH3.3μH2.2μH4.7μH3.3μH2.2μH 950mA 630mA 450mA 1100mA 750mA 1100mA 1200mA 1300mA 700mA 870mA 1000mA DCR 0.13Ω 0.33Ω 0.27Ω 0.2Ω 0.2Ω HEIGHT 1.6mm 1.25mm 1.6mm 1.2mm 2mm0.086Ω 2mm 0.1Ω 1mm 0.19Ω 1mm 0.11Ω 1mm 0.1Ω 1mm 0.08Ω 1mm 0.28Ω 1mm 0.17Ω 1mm 0.12Ω 1mm3407a2f

WUULQH32CN4R7M234.7μH Taiyo YudenNR30102R2MNR30104R7M FDKFDKMIPF2520DFDKMIPF2520DFDKMIPF2520DVLF3010AT4R7-MR70VLF3010AT3R3-MR87VLF3010AT2R2-M1R0 TDK元器件交易网www.cecb2b.com

LTC3407A-2APPLICATIOS IFORATIOOutput Capacitor (COUT) SelectionThe selection of COUT is driven by the required ESR tominimize voltage ripple and load step transients. Typically,once the ESR requirement is satisfied, the capacitance isadequate for filtering. The output ripple (ΔVOUT) is deter-mined by:⎛⎞1

ΔVOUT≈ΔIL⎜ESR+

8fOCOUT⎟⎝⎠

where fO = operating frequency, COUT = output capacitanceand ΔIL = ripple current in the inductor. The output rippleis highest at maximum input voltage since ΔIL increaseswith input voltage. With ΔIL = 0.3 • ILIM the output ripplewill be less than 100mV at maximum VIN and fO = 2.25MHzwith:ESRCOUT < 150mΩOnce the ESR requirements for COUT have been met, theRMS current rating generally far exceeds the IRIPPLE(P-P)requirement, except for an all ceramic solution.In surface mount applications, multiple capacitors mayhave to be paralleled to meet the capacitance, ESR or RMScurrent handling requirement of the application. Alumi-num electrolytic, special polymer, ceramic and dry tantulumcapacitors are all available in surface mount packages. TheOS-CON semiconductor dielectric capacitor available fromSanyo has the lowest ESR(size) product of any aluminumelectrolytic at a somewhat higher price. Special polymercapacitors, such as Sanyo POSCAP, offer very low ESR,but have a lower capacitance density than other types.Tantalum capacitors have the highest capacitance density.However, they also have a larger ESR and it is critical thatthey are surge tested for use in switching power supplies.An excellent choice is the AVX TPS series of surface mounttantalums, available in case heights ranging from 2mm to4mm. Aluminum electrolytic capacitors have a signifi-cantly larger ESR, and are often used in extremely cost-sensitive applications provided that consideration is givento ripple current ratings and long term reliability. Ceramiccapacitors have the lowest ESR and cost, but also have thelowest capacitance density, a high voltage and tempera-ture coefficient, and exhibit audible piezoelectric effects.In addition, the high Q of ceramic capacitors along withUtrace inductance can lead to significant ringing. Othercapacitor types include the Panasonic Special Polymer(SP) capacitors.In most cases, 0.1μF to 1μF of ceramic capacitors shouldalso be placed close to the LTC3407A-2 in parallel with themain capacitors for high frequency decoupling.VIN = 2.5V TO 5.5VCINR6BURST*PULSESKIP*R7PORRUN/SS1L1SW2C2C4R4COUT2R3VFB2GNDVFB1R1R2COUT1SW1C1C3VOUT1 POWER-ONRESETR5VINMODE/SYNCLTC3407A-2RUN/SS2VOUT2L2*MODE/SYNC = 0V: PULSE SKIP MODE/SYNC = VIN: Burst Mode3407A2 F01WUUFigure 1. LTC3407A-2 General SchematicCeramic Input and Output CapacitorsHigher value, lower cost ceramic capacitors are nowbecoming available in smaller case sizes. These are tempt-ing for switching regulator use because of their very lowESR. Unfortunately, the ESR is so low that it can causeloop stability problems. Solid tantalum capacitor ESRgenerates a loop “zero” at 5kHz to 50kHz that is instrumen-tal in giving acceptable loop phase margin. Ceramic ca-pacitors remain capacitive to beyond 300kHz and usuallyresonate with their ESL before ESR becomes effective.Also, ceramic caps are prone to temperature effects whichrequires the designer to check loop stability over theoperating temperature range. To minimize their largetemperature and voltage coefficients, only X5R or X7Rceramic capacitors should be used. A good selection ofceramic capacitors is available from Taiyo Yuden, TDK,and Murata.Great care must be taken when using only ceramic inputand output capacitors. When a ceramic capacitor is usedat the input and the power is being supplied through longwires, such as from a wall adapter, a load step at the outputcan induce ringing at the VIN pin. At best, this ringing cancouple to the output and be mistaken as loop instability.3407a2f

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LTC3407A-2APPLICATIOS IFORATIOAt worst, the ringing at the input can be large enough todamage the part.Since the ESR of a ceramic capacitor is so low, the inputand output capacitor must instead fulfill a charge storagerequirement. During a load step, the output capacitor mustinstantaneously supply the current to support the loaduntil the feedback loop raises the switch current enough tosupport the load. The time required for the feedback loopto respond is dependent on the compensation and theoutput capacitor size. Typically, 3-4 cycles are required torespond to a load step, but only in the first cycle does theoutput drop linearly. The output droop, VDROOP, is usuallyabout 3 times the linear drop of the first cycle. Thus, a goodplace to start is with the output capacitor size of approxi-mately:COUT≈3ΔIOUTfO•VDROOPMore capacitance may be required depending on the dutycycle and load step requirements.In most applications, the input capacitor is merely re-quired to supply high frequency bypassing, since theimpedance to the supply is very low. A 10μF ceramiccapacitor is usually enough for these conditions.Setting the Output VoltageThe LTC3407A-2 develops a 0.6V reference voltage be-tween the feedback pin, VFB, and ground as shown inFigure1. The output voltage is set by a resistive divideraccording to the following formula:⎛R2⎞VOUT=0.6V⎜1+⎟⎝R1⎠Keeping the current small (<5μA) in these resistors maxi-mizes efficiency, but making them too small may allowstray capacitance to cause noise problems and reduce thephase margin of the error amp loop.To improve the frequency response, a feed-forward ca-pacitor CF may also be used. Great care should be taken toroute the VFB line away from noise sources, such as theinductor or the SW line.10

UPower-On ResetThe POR pin is an open-drain output which pulls low wheneither regulator is out of regulation. When both outputvoltages are within ±8.5% of regulation, a timer is startedwhich releases POR after 216 clock cycles (about 29ms inpulse skipping mode). This delay can be significantlylonger in Burst Mode operation with low load currents,since the clock cycles only occur during a burst and therecould be milliseconds of time between bursts. This can bebypassed by tying the POR output to the MODE/SYNCinput, to force pulse skipping mode during a reset. Inaddition, if the output voltage faults during Burst Modesleep, POR could have a slight delay for an undervoltageoutput condition and may not respond to an overvoltageoutput. This can be avoided by using pulse skipping modeinstead. When either channel is shut down, the PORoutput is pulled low, since one or both of the channels arenot in regulation.Mode Selection & Frequency SynchronizationThe MODE/SYNC pin is a multipurpose pin which providesmode selection and frequency synchronization. Connect-ing this pin to VIN enables Burst Mode operation, whichprovides the best low current efficiency at the cost of ahigher output voltage ripple. When this pin is connected toground, pulse skipping operation is selected which pro-vides the lowest output ripple, at the cost of low currentefficiency.The LTC3407A-2 can also be synchronized to anotherLTC3407A-2 by the MODE/SYNC pin. During synchroni-zation, the mode is set to pulse skipping and the top switchturn-on is synchronized to the rising edge of the externalclock.Checking Transient ResponseThe regulator loop response can be checked by looking atthe load transient response. Switching regulators takeseveral cycles to respond to a step in load current. Whena load step occurs, VOUT immediately shifts by an amountequal to ΔILOAD • ESR, where ESR is the effective seriesresistance of COUT. ΔILOAD also begins to charge ordischarge COUT generating a feedback error signal used bythe regulator to return VOUT to its steady-state value. During3407a2f

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LTC3407A-2APPLICATIOS IFORATIOthis recovery time, VOUT can be monitored for overshootor ringing that would indicate a stability problem.The initial output voltage step may not be within thebandwidth of the feedback loop, so the standard second-order overshoot/DC ratio cannot be used to determinephase margin. In addition, a feed-forward capacitor can beadded to improve the high frequency response, as shownin Figure 1. Capacitors C1 and C2 provide phase lead bycreating high frequency zeros with R2 and R4 respec-tively, which improve the phase margin.The output voltage settling behavior is related to thestability of the closed-loop system and will demonstratethe actual overall supply performance. For a detailedexplanation of optimizing the compensation components,including a review of control loop theory, refer to Applica-tion Note 76.In some applications, a more severe transient can becaused by switching in loads with large (>1μF) inputcapacitors. The discharged input capacitors are effectivelyput in parallel with COUT, causing a rapid drop in VOUT. Noregulator can deliver enough current to prevent this prob-lem, if the switch connecting the load has low resistanceand is driven quickly. The solution is to limit the turn-onspeed of the load switch driver. A Hot SwapTM controller isdesigned specifically for this purpose and usually incorpo-rates current limiting, short-circuit protection, and soft-starting.Soft-StartThe RUN/SS pins provide a means to separately run orshut down the two regulators. In addition, they can option-ally be used to externally control the rate at which eachregulator starts up and shuts down. Pulling the RUN/SS1pin below 1V shuts down regulator 1 on the LTC3407A-2.Forcing this pin to VIN enables regulator 1. In order tocontrol the rate at which each regulator turns on and off,connect a resistor and capacitor to the RUN/SS pins asshown in Figure 1. The soft-start duration can be calcu-lated by using the following formula:⎛V−1⎞tSS=RSSCSSIn⎜IN(s)⎟⎝VIN−1.6⎠Hot Swap is a registered trademark of Linear Technology Corporation.UFor approximately a 1ms ramp time, use RSS = 4.7MΩ andCSS = 680pF at VIN = 3.3V.Efficiency ConsiderationsThe percent efficiency of a switching regulator is equal tothe output power divided by the input power times 100%.It is often useful to analyze individual losses to determinewhat is limiting the efficiency and which change wouldproduce the most improvement. Percent efficiency can beexpressed as: %Efficiency = 100% - (L1 + L2 + L3 + ...)where L1, L2, etc. are the individual losses as a percentageof input power.Although all dissipative elements in the circuit producelosses, 4 main sources usually account for most of thelosses in LTC3407A-2 circuits: 1)VIN quiescent current, 2)switching losses, 3) I2R losses, 4) other losses.1) The VIN current is the DC supply current given in theElectrical Characteristics which excludes MOSFET driverand control currents. VIN current results in a small (<0.1%)loss that increases with VIN, even at no load.2) The switching current is the sum of the MOSFET driverand control currents. The MOSFET driver current resultsfrom switching the gate capacitance of the power MOSFETs.Each time a MOSFET gate is switched from low to high tolow again, a packet of charge dQ moves from VIN toground. The resulting dQ/dt is a current out of VIN that istypically much larger than the DC bias current. In continu-ous mode, IGATECHG = fO(QT + QB), where QT and QB are thegate charges of the internal top and bottom MOSFETswitches. The gate charge losses are proportional to VINand thus their effects will be more pronounced at highersupply voltages.3) I2R losses are calculated from the DC resistances of theinternal switches, RSW, and external inductor, RL. Incontinuous mode, the average output current flows throughinductor L, but is “chopped” between the internal top andbottom switches. Thus, the series resistance looking into3407a2f

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LTC3407A-2APPLICATIOS IFORATIOthe SW pin is a function of both top and bottom MOSFETRDS(ON) and the duty cycle (D) as follows:RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D)The RDS(ON) for both the top and bottom MOSFETs can beobtained from the Typical Performance Characteristicscurves. Thus, to obtain I2R losses:I2R losses = IOUT2(RSW + RL)4) Other ‘hidden’ losses such as copper trace and internalbattery resistances can account for additional efficiencydegradations in portable systems. It is very important toinclude these “system” level losses in the design of asystem. The internal battery and fuse resistance lossescan be minimized by making sure that CIN has adequatecharge storage and very low ESR at the switching fre-quency. Other losses including diode conduction lossesduring dead-time and inductor core losses generally ac-count for less than 2% total additional loss.Thermal ConsiderationsIn a majority of applications, the LTC3407A-2 does notdissipate much heat due to its high efficiency. However, inapplications where the LTC3407A-2 is running at highambient temperature with low supply voltage and highduty cycles, such as in dropout, the heat dissipated mayexceed the maximum junction temperature of the part. Ifthe junction temperature reaches approximately 150°C,both power switches will be turned off and the SW nodewill become high impedance.To prevent the LTC3407A-2 from exceeding the maximumjunction temperature, the user will need to do somethermal analysis. The goal of the thermal analysis is todetermine whether the power dissipated exceeds themaximum junction temperature of the part. The tempera-ture rise is given by:TRISE = PD • θJA12

Uwhere PD is the power dissipated by the regulator and θJAis the thermal resistance from the junction of the die to theambient temperature.The junction temperature, TJ, is given by:TJ = TRISE + TAMBIENTAs an example, consider the case when the LTC3407A-2is in dropout on both channels at an input voltage of 2.7Vwith a load current of 800mA and an ambient temperatureof 70°C. From the Typical Performance Characteristicsgraph of Switch Resistance, the RDS(ON) resistance of themain switch is 0.425Ω. Therefore, power dissipated byeach channel is:PD = I2 • RDS(ON) = 272mWThe MS package junction-to-ambient thermal resistance,θJA, is 45°C/W. Therefore, the junction temperature of theregulator operating in a 70°C ambient temperature isapproximately:TJ = 2 • 0.272 • 45 + 70 = 94.5°Cwhich is below the absolute maximum junction tempera-ture of 125°C.Design ExampleAs a design example, consider using the LTC3407A-2 in aportable application with a Li-Ion battery. The batteryprovides a VIN = 2.8V to 4.2V. The load requires a maxi-mum of 800mA in active mode and 2mA in standby mode.The output voltage is VOUT = 2.5V. Since the load stillneeds power in standby, Burst Mode operation is selectedfor good low load efficiency.First, calculate the inductor value for about 30% ripplecurrent at maximum VIN:WUUL=2.5V⎛2.5V⎞•⎜1–=1.25μH⎠2.25MHz•360mA⎝4.2V⎟3407a2f

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LTC3407A-2APPLICATIOS IFORATIOChoosing the next highest standardized inductor value of2.2μH, results in a maximum ripple current of:ΔIL=2.5V⎛2.5V⎞•⎜1−=204mA⎟2.25MHz•2.2μH⎝4.2V⎠For cost reasons, a ceramic capacitor will be used. COUTselection is then based on load step droop instead of ESRrequirements. For a 5% output droop:COUT≈2.5800mA=7.1μF2.25MHz•(5%•2.5V)The closest standard value is 10μF. Since the outputimpedance of a Li-Ion battery is very low, CIN is typically10μF.The output voltage can now be programmed by choosingthe values of R1 and R2. To maintain high efficiency, thecurrent in these resistors should be kept small. Choosing2μA with the 0.6V feedback voltage makes R1~300k. Aclose standard 1% resistor is 280k, and R2 is then 887k.The POR pin is a common drain output and requires a pull-up resistor. A 100k resistor is used for adequatespeed.Figure 3 shows the complete schematic for this designexample. The specific passive components chosen allowfor a 1mm height power supply that maintains a highefficiency across load.Board Layout ConsiderationsWhen laying out the printed circuit board, the followingchecklist should be used to ensure proper operation of theVINCINVOUT2C5R4COUT2R3BOLD LINES INDICATE HIGH CURRENT PATHSFigure 2. LTC3407A-2 Layout Diagram (See Board Layout Checklist)3407a2f

ULTC3407A-2. These items are also illustrated graphicallyin the layout diagram of Figure 2. Check the following inyour layout:1. Does the capacitor CIN connect to the power VIN (Pin 3)and GND (exposed pad) as closely as possible? Thiscapacitor provides the AC current to the internal powerMOSFETs and their drivers.2. Are COUT and L1 closely connected? The (–) plate ofCOUT returns current to GND and the (–) plate of CIN.3. The resistor divider formed by R1 and R2 must beconnected between the (+) plate of COUT and a groundsense line terminated near GND (exposed pad). The feed-back signals VFB1 and VFB2 should be routed away fromnoisy components and traces, such as the SW lines (Pins4 and 7), and their traces should be minimized.4. Keep sensitive components away from the SW pins. Theinput capacitor CIN and the resistors R1 to R4 should berouted away from the SW traces and the inductors.5. A ground plane is preferred, but if not available keep thesignal and power grounds segregated with small signalcomponents returning to the GND pin at one point.Addtionally the two grounds should not share the highcurrent paths of CIN or COUT.6. Flood all unused areas on all layers with copper.Flooding with copper will reduce the temperature rise ofpower components. These copper areas should be con-nected to VIN or GND.RUN/SS2VINRUN/SS1MODE/SYNCLTC3407A-2L2SW2SW1C4L1VOUT1 PORVFB2GNDVFB1R1R2COUT13407A2 F02WUU13

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LTC3407A-2TYPICAL APPLICATIO SVIN = 2.5VTO 5.5VC110μFRUN/SS2MODE/SYNCL22.2μHSW2C5, 22pFLTC3407A-2SW1C4, 22pFVINRUN/SS1PORL12.2μHR5100kPOWER-ONRESET10090802.5V1.8VEFFICIENCY (%)VOUT2 = 2.5VAT 800mAC310μFR4887kVFB2R3280kGNDC1, C2, C3: TAIYO YUDEN JMK316BJ106MDL1, L2: TDK VLF3010AT-2R2M1R0Figure 3. 1mm Height Core SupplyVIN = 2.5V TO 5.5VR.7MΩCIN10μFR7100kPOWER-ONRESETL14.7μHSW2C2, 22pFSW1C1, 22pFEFFICIENCY (%)RUN/SS2VOUT2 = 2.5VAT 800mAC4680pFCOUT210μFR4887kVFB2R3280kMODE/SYNCL24.7μHCIN, COUT1, COUT2: TAIYO YUDEN JMK316BJ106ML L1, L2: TDK VLF3012AT-4R7M74Figure 4. Low Ripple Buck Regulators with Soft-Start14

UEfficiency vs Load CurrentVOUT1 = 1.8VAT 800mA70605040302010VIN = 3.3VBurst Mode OPERATIONNO LOAD ON OTHER CHANNEL110100LOAD CURRENT (mA)10003407A2 TA03bVFB1R1301kR2604kC210μF3407A2 TA030Efficiency vs Load Current100R54.7MΩVINLTC3407A-2PORRUN/SS1VOUT1 = 1.2VAT 800mAC3680pFR1604kR2604kCOUT110μF908070605040302010012.5V1.2VVFB1GNDVIN = 3.3VBurst Mode OPERATIONNO LOAD ON OTHER CHANNEL10100LOAD CURRENT (mA)10003407A2 TA04b3407A2 TA043407a2f

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LTC3407A-2PACKAGE DESCRIPTIO3.50 ±0.051.65 ±0.052.15 ±0.05(2 SIDES)PACKAGEOUTLINE0.25 ± 0.050.50BSC2.38 ±0.05(2 SIDES)RECOMMENDED SOLDER PAD PITCH AND DIMENSIONSNOTE:1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT2.DRAWING NOT TO SCALE3. ALL DIMENSIONS ARE IN MILLIMETERS4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE5. EXPOSED PAD SHALL BE SOLDER PLATED6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1TOP MARK(SEE NOTE 6)2.794 ± 0.102(.110 ± .004)0.8 ± 0.127(.035 ± .005)5.23(.206)MIN2.083 ± 0.1023.20 – 3.45(.082 ± .004)(.126 – .136)GAUGE PLANE0.500.305 ± 0.038(.0197)(.0120 ± .0015)BSCTYPRECOMMENDED SOLDER PAD LAYOUTNOTE:1. DIMENSIONS IN MILLIMETER/(INCH)2. DRAWING NOT TO SCALE3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006\") PER SIDE4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006\") PER SIDE5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004\") MAXInformation furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.UDD Package10-Lead Plastic DFN (3mm × 3mm)(Reference LTC DWG # 05-08-1699)R = 0.115TYP60.675 ±0.050.38 ± 0.10103.00 ±0.10(4 SIDES)1.65 ± 0.10(2 SIDES)(DD) DFN 110350.200 REF0.75 ±0.052.38 ±0.10(2 SIDES)10.25 ± 0.050.50 BSC0.00 – 0.05BOTTOM VIEW—EXPOSED PADMSE Package10-Lead Plastic MSOP(Reference LTC DWG # 05-08-16)3.00 ± 0.102(.118 ± .004)(NOTE 3)BOTTOM VIEW OFEXPOSED PAD OPTION1098760.497 ± 0.076(.0196 ± .003)REF12.06 ± 0.102(.081 ± .004)1.83 ± 0.102(.072 ± .004)0.254(.010)DETAIL “A”0° – 6° TYP4.90 ± 0.152(.193 ± .006)3.00 ± 0.102(.118 ± .004)(NOTE 4)0.53 ± 0.152(.021 ± .006)DETAIL “A”0.18(.007)1.10(.043)MAX123450.86(.034)REF10SEATINGPLANE0.17 – 0.27(.007 – .011)TYP0.50(.0197)BSC0.127 ± 0.076(.005 ± .003)MSOP (MSE) 06033407a2f

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LTC3407A-2TYPICAL APPLICATIO2mm Height Lithium-Ion Single Inductor Buck-Boost Regulator and a Buck RegulatorVIN = 2.8VTO 4.2VC110μFRUN/SS2MODE/SYNCD1VOUT2 = 3.3VAT 200mAM1L210μHSW2LTC3407A-2SW1C4, 22pFVINRUN/SS1PORR5100kPOWER-ONRESETL12.2μH+C7μFC310μFC1, C2, C3: TAIYO YUDEN JMK316BJ106MLC6: SANYO 6TPB47MD1: PHILIPS PMEG2010Efficiency vs Load Current908070EFFICIENCY (%)100

EFFICIENCY (%)60504030201001VOUT = 3.3VBurst Mode OPERATIONNO LOAD ON OTHER CHANNEL10100LOAD CURRENT (mA)10003407A2 TA05aRELATED PARTSPART NUMBERLTC3405/LTC3405ALTC3406/LTC3406BDESCRIPTION300mA (IOUT), 1.5MHz,Synchronous Step-Down DC/DC Converter600mA (IOUT), 1.5MHz,Synchronous Step-Down DC/DC ConverterCOMMENTS96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20μA,ISD <1μA, ThinSOT Package96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20μA,ISD <1μA, ThinSOT Package96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA,ISD <1μA, MS10E Package, DFN Package96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 26μA,ISD <1μA, SC70 Package95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA,ISD <1μA, MSOP-10 Package95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA,ISD <1μA, TSSOP-16E Package95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = μA,ISD <1μA, TSSOP-28E Package95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, IQ = 25μA,ISD <1μA, MSOP-10 Package/DFN Package95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA,ISD <1μA, MS10E Package/DFN Package3407a2f

LT 0907 • PRINTED IN USA

LTC3407/LTC3407-2600mA/800mA (IOUT), 1.5MHz/2.25MHz,LTC3407-3/LTC3407-4/Dual Synchronous Step-Down DC/DC ConverterLTC3407ALTC3410/LTC3410BLTC3411LTC3412/LTC3412ALTC3414LTC3440/LTC3441LTC3548/LTC3548-1/LTC3548-2300mA (IOUT), 2.25MHz,Synchronous Step-Down DC/DC Converter in SC701.25A (IOUT), 4MHz,Synchronous Step-Down DC/DC Converter2.5A (IOUT), 4MHz,Synchronous Step-Down DC/DC Converter4A (IOUT), 4MHz,Synchronous Step-Down DC/DC Converter600mA/1.2A (IOUT), 2MHz/1MHz,Synchronous Buck-Boost DC/DC Converter400mA/800mA (IOUT), 2.25MHz,Dual Synchronous Step-Down DC/DC Converter16

Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.comUVOUT1 = 1.8VAT 800mAR4887kR3196kVFB2GNDVFB1R2R1887k442kC210μFL1: MURATA LQH32CN2R2M33L2: TOKO A914BYW-100M (D52LC SERIES)M1: SILICONIX Si23023407A TA05Efficiency vs Load Current90

2.8V4.2V3.6V3.6V4.2V2.8V807060504030201001

VOUT = 1.8VBurst Mode OPERATIONNO LOAD ON OTHER CHANNEL10100LOAD CURRENT (mA)

1000

3407A2 TA05b

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