1.WhatisNorthbridge?What'sthepurposeofit?whatisitcomposedof?What'stheSouthbridge'spurpose?
ThenorthbridgehandlescommunicationsamongthefasterdevicessuchasCPU,DDR,BIOSROM,andPCIExpress(orAGP)cardsandthesouthbridge.Southbridgeconnectsslower,lowerperformanceperipherals.BecausethesouthbridgeisfurtherremovedfromtheCPU,itisgivenresponsibilityfortheslowerdevicesonacomputer.NorthbridgesameasAHBbusandsouthbridgesameasAPBbusinARM-basedSOCarchitecture.
2.What'stheperformancepeakcanx16Gen1PCIelinkachieve-basedonwhatyouread?Thetransmission/receptionrateis2.5Gbits/secperLaneperdirection.Tosupportagreaterdegreeofrobustnessduringdatatransmissionandreception,eachbyteofdatatransmittedisconvertedintoa10-bitcode,sotheactuallydatarateis2Gbits/sec×2(foreachdirection)，theperformancepeakofx16Gen1PCIelinkcanachieveGbits/sec(8GB/s).AsfarasIknow,thePCIe3.0architectureuses128b/130bencodingscheme.Thenew128b/130bencodingschemealsoallowsnearby100%efficiency,charitythe25%potencyenlargeascomparedtothe8b/10bpotencyofpriorversions,whichenablesthedoubledbandwidth.
3.What'stheusageofFirst/LastDWByteEnablesfieldinpacketheader?
FirstDWByteEnablesmaptothebyteswithinthefirstdoubleword(32bits)ofpayload.LastDWByteEnablesmaptothebyteswithinthelastdoubleword(32bits)ofpayload.4.What'stheusageofTagfiledinpacketheader?IfDeviceAsendsaMemoryReadandthenaMemoryWriteRequesttoDeviceB,couldthetwopackets'Tagvaluebethesame?
Tagfiledincludedinthe3DWor4DWheader,whichareusedtoidentifyeachoutstandingrequestissuedbytherequester.Asnon-postedrequestsaresent,thenextsequentialtagisassigned.
DeviceAsendsaMemoryReadandthenaMemoryWriteRequesttoDeviceB,thetagvaluenotsame(I'mnotsure),becauseMemoryReadisaNon-PostedMemoryTransaction,MemoryWriteisaPostedMemoryTransaction.
5.HowmanytypesofFlowControlDLLP?What'stheusageofthem?
Thetransmitsideofadevicereportsflowcontrolcreditinformationfromitsreceivebufferstotheoppositedevice.ThespecificationdefinesthreetypesofFlowControlpackets:
FlowControlInit1—usedtoreportthesizeoftheFlowControlbuffersforagivenvirtualchannel.
FlowControlInit2—sameasFlowControlInit1exceptitisusedtoverifycompletionofflowcontrolinitializationateachendofthelink(receivingdeviceignoresflowcontrolcreditinformation).
FlowControlUpdate—usedtoupdateCreditLimitperiodically.6.PleasesummarythedetailsofACK/NAKmechanism.
ForeveryTLPthatissentfromonedevice(DeviceA)toanother(DeviceB)acrossoneLink,thereceiverchecksforerrorsintheTLP(usingtheTLP'sLCRCfield).ThereceiverDeviceBnotifiestransmitterDeviceAongoodorbadreceptionofTLPsbyreturninganACKoraNAK
DLLP.ReceptionofanACKDLLPbythetransmitterindicatesthatthereceiverhasreceivedoneormoreTLP(s)successfully.ReceptionofaNAKDLLPbythetransmitterindicatesthatthereceiverhasreceivedoneormoreTLP(s)inerror.DeviceAwhichreceivesaNAKDLLPthenre-sendsassociatedTLP(s)whichwillhopefully,arriveatthereceiversuccessfullywithouterror.7.HowmanytypesofOrderedSets?Givethedetailsoftheirusage.
Ordered-SetsareexchangedbetweenneighboringdevicesduringtheLinktrainingandinitializationprocess.ThefiveOrdered-Setsare:
TrainingSequence1and2(TS1andTS2)—TheyareexchangedduringthePolling,ConfigurationandRecoverystatesoftheLTSSM.
ElectricalIdle—ThisOrdered-SetistransmittedtoareceiverpriortothetransmitterplacingitstransmithalfoftheLinkintheElectricalIdlestate.ThereceiverdetectsthisOrdered-Set,de-gatesitserrordetectionlogicandpreparesfortheLinktogototheElectricalIdlestate.
FastTrainingSequence(FTS)—AtransmitterthatwishestotransitionthestateofitsLinkfromtheL0slowpowerstate(ElectricalIdle)totheL0statesendsadefinednumberofFTSOrdered-Setstothereceiver.TheminimumnumberofFTSOrdered-SetsthatthetransmittermustsendtothereceiverissenttothetransmitterbythereceiverduringLinktrainingandinitialization.
Skip(SKIP)Ordered-Sets—ItistransmittedatregularintervalsfromthetransmittertothereceiverandisusedforClockToleranceCompensation.
8.WhatisthedifferencebetweenL0andL0s?
L0:Thisisthenormal,fullyactivestateofaLinkduringwhichTLPs,DLLPsandPLPscanbetransmittedandreceived.
L0s:Thisisalowpower,ActivePowerManagementstate.Ittakesaveryshorttime(intheorderof50ns)totransitfromtheL0sstatebacktotheL0state(becausetheLTSSMdoesnothavetogothroughtheRecoverystate).ThisstateisenteredafteratransmittersendsandtheremotereceiverreceivesElectricalIdleOrdered-SetswhileintheL0state.ExitfromtheL0sstatetotheL0stateinvolvessendingandreceivingFTSOrdered-Sets.WhentransitioningfromL0sexittoL0,Lane-to-Lanede-skewmustbeperformed,andBitandSymbolLockmustbere-established.9.EntryintoL1canoccurintwoways,givethedetailsofthem.
EntryfromL0—TheL0sstatemachineisenteredwhenadevice'shigherlayerdirectsthedevicetodoso.
EntryfromL1.Entry—EnterL1.Idleafter50UI(20ns),whilethetransmitterdrivesastableDCcommonmodevoltage.
10.What'sthelane-skewbetweenthelanes?What’sthecauseofskew?Howtodolane-to-lanedeskew?
SymbolsaretransmittedsimultaneouslyonallLanesusingthesametransmitclock,buttheycannotbeexpectedtoarriveatthereceiveratthesametime,andlane-to-laneskewonlyexistedonmulti-lanelinks,thecauseofskewinclude:Chipdifferentialdriversandreceivers,Printedwiringboardimpedancevariations,Lanewirelengthmiss-matches,Delaysinjectedbytheserializationandde-serializationlogicetc.
11.What'sthepurposeofelasticbufferinphysicallayer?
TheElasticBuffercompensatesforthedifferencebetweentheRxClock(whichisderivedfromtheremoteport'stransmitfrequency)andtheLocalClock(whichisderivedfromthelocalport'stransmitfrequency)，thepurposeofelasticbuffersameasAsynchronous-FIFOusedinmulti-clockdomaindesign.
