THC63LVD823资料

THC63LVD823_Rev2.0 THC63LVD823Single(135MHz)/Dual(170MHz) Link LVDS Transmitter for SXGA/SXGA+/UXGAGeneral DescriptionThe THC63LVD823 transmitter is designed to supportSingle Link transmission between Host and Flat PanelDisplay up to SXGA+ resolutions and Dual Link trans-mission between Host and Flat Panel Display up toUXGA resolutions. The THC63LVD823 converts 48bits of CMOS/TTLdata into LVDS(Low Voltage Differential Signaling)data stream. The transmitter can be programmed for ris-ing edge or falling edge clocks through a dedicated pin.In Single Link, the transmit clock frequency of135MHz, 48bits of RGB data are transmitted at aneffective rate of 945Mbps per LVDS channel. Using a135MHz clock, the data throughput is 472Mbytes persecond.In Dual Link, the transmit clock frequency of 85MHz,48bits of RGB data are transmitted at an effective rateof 595Mbps per LVDS channel. Using a 85MHz clock,the data throughput is 595Mbytes per second.Features•Wide dot clock range: 25-135MHz suited for VGA, SVGA, XGA, SXGA, SXGA+ and UXGA•PLL requires No external components•Supports Dual Link, Dual-in (TTL)/Dual-out (LVDS) pixel up to 170MHz dot clock for UXGA•Supports Single Link, Dual-in (TTL)/Single-out •••••••(LVDS) pixel up to 135MHz dot clock for SXGA+Supports Single Link, Single-in (TTL)/Single-out (LVDS) pixel up to 85MHz dot clock for XGAClock edge selectableSupports Reduced swing LVDS for Low EMIPower down modeLow power single 3.3V CMOS design100pin TQFPTHC63LVDM83R compatibleBlock DiagramCMOS/TTL INPUT8MUX88888PARALLEL TO SERIALLVDS OUTPUTRED11st DATAGREEN1BLUE1TA1 +/-TB1 +/-TC1 +/-TD1 +/-TCLK1 +/-(25 to 135MHz)1st LinkHSYNCVSYNCDETA2 +/-PARALLEL TO SERIAL888TB2 +/-TC2 +/-TD2 +/-TCLK2 +/-(25 to 85MHz)2nd LinkRED22nd DATAGREEN2BLUE2TRANSMITTER CLOCK IN(25 to 85MHz)R/F/PDWNPLLCopyright 2000-2003 THine Electronics, Inc. All rights reserved 1 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 Pin Out75B15B16B17R20R21R22R23R24R25R26R27VCCGNDG20G21G22G23G24G25G26G27B20B21B22B23767778798081828384858687809192939495969799100747372717069686766656362616059585756555453525150494847454443424140393837363534333231302928272623456710111213141516171819202122232425B13B12GNDVCCB11B10G17G16G15G14G13G12G11G10R17R16R15R14GNDVCCR13R12R11R10B14LVDS GNDTA1-TA1+TB1-TB1+LVDS VCCTC1-TC1+TCLK1-TCLK1+TD1-TD1+LVDS GNDTA2-TA2+TB2-TB2+LVDS VCCTC2-TC2+TCLK2-TCLK2+TD2-TD2+LVDS GND1B24Copyright 2000-2003 THine Electronics, Inc. All rights reserved 2 THine Electronics, Inc.B25VCCGNDB26B27HSYNCVSYNCDECLKINR/FRSTEST1TEST2MODE1MODE0OE6/8/PDWNTEST3TEST4TEST5PLL GNDPLL VCCPLL GND元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 Pin DescriptionPin NameTA1+, TA1-TB1+, TB1-TC1+, TC1-TD1+, TD1-TCLK1+, TCLK1-TA2+, TA2-TB2+, TB2-TC2+, TC2-TD2+, TD2-TCLK2+, TCLK2-R17 ~ R10G17 ~ G10B17 ~ B10R27 ~ R20G27 ~ G20B27 ~ B20DEVSYNCHSYNCCLKINTEST1, TEST5TEST3, TEST4TEST2/PDWN6/8OEPin #48, 4946, 4743, 4439, 4041, 4236, 3734, 3531, 3227, 2829, 3060, 59, 58, 57, 54, 53, 52, 5168, 67, 66, 65, , 63, 62, 6178, 77, 76, 75, 74, 73, 70, 6986, 85, 84, 83, 82, 81, 80, 7996, 95, 94, 93, 92, 91, 90, 6, 5, 2, 1, 100, 99, 98, 979871013, 2220, 2114191817TypeLVDS OUTLVDS OUTLVDS OUTLVDS OUTLVDS OUTLVDS OUTLVDS OUTLVDS OUTLVDS OUTLVDS OUTININININININININININOUTINININININData Enable Input.Vsync Input.Hsync Input.Clock Input.Test Pins.Test Pins, must be L for normal operation.Test Pins, must be H for normal operation.H: Normal operation,L: Power down (all outputs are Hi-Z)6bit/8bit color select.H: 6bit (TDx+/- are GND), L: 8bit.Output enable.H: Output enable, L: Output disable (all outputs are Hi-Z)Pixel Data Mode.MODE1, MODE015, 16INMODE1LLHMODE0LHHModeDual Link (Dual-in/Dual-out)Single Link (Dual-in/Single-out)Single Link (Single-in/Single-out)DescriptionThe 1st Link. The 1st pixel output data when Dual Link.LVDS Clock Out for 1st Link.The 2nd Link. These pins are disabled when Single Link.LVDS Clock Out for 2nd Link.The 1st Pixel Data Inputs.The 2nd Pixel Data Inputs.RS12INLVDS swing range select.H: Normal range, L: Reduced range.Copyright 2000-2003 THine Electronics, Inc. All rights reserved 3 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 Pin #113, 55, 71, 874, 56, 72, 8833, 4526, 38, 502423, 25TypeINPowerGroundPowerGroundPowerGroundDescriptionInput Clock Triggering Edge Select.H: Rising edge, L: Falling edgePower Supply Pins for TTL inputs, output and digital circuitry.Ground Pins for TTL inputs, outputs and digital circuitry.Power Supply Pins for LVDS Outputs.Ground Pins for LVDS Outputs.Power Supply for PLL circuitry.Ground Pin for PLL circuitry.Pin NameR/FVCCGNDLVDS VCCLVDS GNDPLL VCCPLL GNDAbsolute Maximum Ratings 1Supply Voltage (VCC)CMOS/TTL Input VoltageCMOS/TTL Output VoltageLVDS Driver Output VoltageOutput CurrentJunction TemperatureStorage Temperature RangeLead Temperature (Soldering, 4sec)Maximum Power Dissipation @+25°C-0.3V ~ +4.0V-0.3V ~ (VCC + 0.3V)-0.3V ~ (VCC + 0.3V)-0.3V ~ (VCC + 0.3V)-30mA ~ 30mA+125°C-55°C ~ +125°C+260°C1.0WElectrical CharacteristicsCMOS/TTL DC SpecificationsVCC = 3.0V ~ 3.6V, Ta = -10°C ~ +70°CSymbolVIHVILIINCParameterHigh Level Input VoltageLow Level Input VoltageInput Current0V≤VIN≤VCCConditionsMin.2.0GNDTyp.Max.VCC0.8±10UnitsVVµA1.“Absolute Maximum Ratings” are those valued beyond which the safety of the device can not be guaranteed. They are not meant to imply that the device should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.Copyright 2000-2003 THine Electronics, Inc. All rights reserved 4 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 VCC = 3.0V ~ 3.6V, Ta = -10°C ~ +70°CLVDS Transmitter DC SpecificationsSymbolParameterConditionsNormal swingReduced swingMin.250100Typ.350200Max.45030035RL=100Ω1.1251.251.37535VOUT=0V, RL=100Ω/PDWN=0V, VOUT=0V to VCC-24±10UnitsmVmVmVVmVmAµAVODDifferential Output VoltageRL=100Ω∆VODVOC∆VOCIOSIOZChange in VOD between complementary output statesCommon Mode VoltageChange in VOC between complementary output statesOutput Short Circuit CurrentOutput TRI-State currentSupply CurrentVCC = 3.0V ~ 3.6V, Ta = -10°C ~ +70°CSymbolParameterCondition(*)VESA SXGA ( 60Hz )Transmitter Supply ITCCGCurrent(256 Gray Scale Pattern)VESA UXGA ( 60Hz )CLKIN=81MHzVESA SXGA ( 60Hz )Transmitter SupplyITCCWCurrent(Double Checker Pattern)VESA UXGA ( 60Hz )CLKIN=81MHzITCCSTransmitter Power Down Supply Current/PDWN = LCLKIN=54MHzCLKIN=54MHzMODE<1:0>=LHRL=100Ω,CL=5pFVCC=3.3VMODE<1:0>=LLRL=100Ω,CL=5pFVCC=3.3VMODE<1:0>=LHRL=100Ω,CL=5pFVCC=3.3VMODE<1:0>=LLRL=100Ω,CL=5pFVCC=3.310µA8699mA5361mA78mA5058mATyp.Max.Units(*) VESA is a trademark of the Video Electronics Standards Association.Copyright 2000-2003 THine Electronics, Inc. All rights reserved 5 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 256 Gray Scale PatternCLKINRx0/Gx0/Bx0Rx1/Gx1/Bx1Rx2/Gx2/Bx2Rx3/Gx3/Bx3Rx4/Gx4/Bx4Rx5/Gx5/Bx5Rx6/Gx6/Bx6Rx7/Gx7/Bx7x=1,2DEDouble Checker PatternCLKINR1n/G1n/B1nR2n/G2n/B2nn=0~7DECopyright 2000-2003 THine Electronics, Inc. All rights reserved 6 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 VCC = 3.0V ~ 3.6V, Ta = -10°C ~ +70°CSwitching CharacteristicsSymboltTCITtTCIPtTCHtTCLtTStTHtTCOPtLVTtTOP1tTOP0tTOP6tTOP5tTOP4tTOP3tTOP2tTPLLtOEtCK12CLK IN PeriodCLK IN High TimeCLK IN Low TimeTTL Data Setup to CLK INTTL Data Hold from CKL INCLK OUT PeriodLVDS Transition TimeOutput Data Position0 (tTCOP = 7.4ns)Output Data Position1 (tTCOP = 7.4ns)Output Data Position2 (tTCOP = 7.4ns)Output Data Position3 (tTCOP = 7.4ns)Output Data Position4 (tTCOP = 7.4ns)Output Data Position5 (tTCOP = 7.4ns)Output Data Position6 (tTCOP = 7.4ns)Phase Lock Loop SetOE High to Data ValidSkew Time between TCLK1+ and TCLK2+500.5-0.15t--TCOP------------–0.157t2--TCOP------------–0.157t3--TCOP------------–0.157t4--TCOP------------–0.157t5--TCOP------------–0.157t6--TCOP------------–0.157ParameterCLK IN Transition timeMin.11.760.35tTCIP0.35tTCIP2.50.011.767.4Typ.Max.5.040.0Unitsnsnsnsnsnsns40.020.0nsnsnsnsnsnsnsnsnsnsmsnsns0.5tTCIP0.5tTCIP0.65tTCIP0.65tTCIPDual LinkSingle Link0.50.0tTCOP--------------7t2--TCOP------------7t3--TCOP------------7t4--TCOP------------7t5--TCOP------------7t6--TCOP------------7+0.15t--TCOP------------+0.157t2--TCOP------------+0.157t3--TCOP------------+0.157t4--TCOP------------+0.157t5--TCOP------------+0.157t6--TCOP------------+0.15710.0AC Timing DiagramsTTL Input90%90%10%tTCITtTCIT80%20%CLK IN10%LVDS OutputVdiff=(TA+)-(TA-)TA+5pFTA-LVDS Output Load100Ω80%Vdiff20%tLVTtLVTCopyright 2000-2003 THine Electronics, Inc. All rights reserved 7 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 AC Timing DiagramsTTL InputstTCIP2.0VtTCH2.0V2.0VtTCLR/F = L0.8V0.8VR/F = HCLK INHsyncVsyncDERxnGxnBxntTS2.0V0.8VtTH2.0V0.8Vx = 1,2n = 0~7Phase Lock Loop Set Time3.0VVCCCLKIN2.0V/PDWNtTPLLVdiff=0VTCLKx+/-Copyright 2000-2003 THine Electronics, Inc. All rights reserved 8 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 Power Up SequencePower Up Sequence must be Sequence1 or Sequence2.1)Sequence1VCCPVCCLVCCtPWVCCVCC/2GNDtPDVCCPDVCC/2GND1) tPW < 10msec2) tPD > tPW2)Sequence2VCCPVCCLVCC3.0VVCCGNDVCCPDGNDGNDPD pin must be High after VCC voltage is 3.0V. Copyright 2000-2003 THine Electronics, Inc. All rights reserved 9 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 AC Timing DiagramsLVDS OutputstTOP2tTOP3tTOP4tTOP5tTOP6tTOP0tTOP1Tyx+/-Tyx6Tyx5Tyx4Tyx3Tyx2Tyx1Tyx0Tyx6Tyx5Tyx4Tyx3Tyx2Tyx1TCLKx+Vdiff = 0VVdiff = 0Vx = 1,2y = A,B,C,DtTCOPTCLK1+Vdiff = 0VtCK12TCLK2+Vdiff = 0VNote: Vdiff = (Tyx+) - (Tyx-) , (TCLKx+) - (TCLKx-)Copyright 2000-2003 THine Electronics, Inc. All rights reserved 10 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 Pixel Map Table for Single/Dual Link1st Pixel DataTFT Panel Data24BitLSBR10R11R12R13R14R15R16MSBLSBR17G10G11G12G13G14G15G16MSBLSBG17B10B11B12B13B14B15B16MSBB1718Bit--R10R11R12R13R14R15--G10G11G12G13G14G15--B10B11B12B13B14B15823 TTL Input PinR10R11R12R13R14R15R16R17G10G11G12G13G14G15G16G17B10B11B12B13B14B15B16B17MSBMSBLSBMSBLSB2nd Pixel DataTFT Panel Data24BitLSBR20R21R22R23R24R25R26R27G20G21G22G23G24G25G26G27B20B21B22B23B24B25B26B2718Bit--R20R21R22R23R24R25--G20G21G22G23G24G25--B20B21B22B23B24B25823 TTL Input PinR20R21R22R23R24R25R26R27G20G21G22G23G24G25G26G27B20B21B22B23B24B25B26B27Copyright 2000-2003 THine Electronics, Inc. All rights reserved 11 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 823 TTL Data Input Timing for Single/Dual LinkExample : SXGA+(1400 x 1050)HSYNCDECLKINR1x/G1x/B1xR2x/G2x/B2xn = 0~7#1#2#3#4#5#6#7#81395#1397#13991396#1398#1400#1#2#1399#1400TFT Panel(1400 x 1050)Copyright 2000-2003 THine Electronics, Inc. All rights reserved 12 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 TTL Data Inputs Timing Diagrams in Dual Link (Dual-in / Dual-out Mode)Previous CycleCurrent CycleTCLK1+TA1+/-R16’R15’R14’R13’R12’G12R17R16R15R14R13R12G12’’TB1+/-G17’G16’G15’G14’G13’B13B12G17G16G15G14G13B13’’TC1+/-HSYNC’B17’B16’B15’B14’DEVSYNCHSYNCB17B16B15B14DE’’TD1+/-B10’G11’G10’R11’R10’LB11B10G11G10R11R10L’’TCLK2+TA2+/-R26’R25’R24’R23’R22’G22R27R26R25R24R23R22G22’’TB2+/-G27’G26’G25’G24’G23’B23B22G27G26G25G24G23B23’’TC2+/-HSYNC’B27’B26’B25’B24’DEVSYNCHSYNCB27B26B25B24DE’’TD2+/-B20’G21’G20’R21’R20’LB21B20G21G20R21R20L’’Copyright 2000-2003 THine Electronics, Inc. All rights reserved 13 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 TTL Data Inputs Timing Diagrams in Single Link (Dual-in / Single-out Mode)Previous Cycle(2nd Pixel Data)Current Cycle(1st Pixel Data)TCLK1+TA1+/-R26’R25’R24’R23’R22’G12R17R16R15R14R13R12G22’’TB1+/-G27’G26’G25’G24’G23’B13B12G17G16G15G14G13B23’’TC1+/-HSYNC’B27’B26’B25’B24’DEVSYNCHSYNCB17B16B15B14DE’’TD1+/-B20’G21’G20’R21’R20’LB11B10G11G10R11R10L’’Copyright 2000-2003 THine Electronics, Inc. All rights reserved 14 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 PackageINDEX ∆PIN No.110076750.5TYP14.0SQ TYP0.22255126501.00TYP1.2MAX16.0SQ TYPUNIT:mmCopyright 2000-2003 THine Electronics, Inc. All rights reserved 15 THine Electronics, Inc.元器件交易网www.cecb2b.com

THC63LVD823 _Rev2.0 Notes to Users:1.The contents of this data sheet are subject to change without prior notice.2.Circuit diagrams shown in this data sheet are examples of application. Therefore, please pay sufficient attentionwhen designing circuits. Even if there are incorrect descriptions, we are not responsible for any problem due tothem. Please note that incorrect descriptions sometimes cannot be corrected immediately if found.3.Our copyright and know-how are included in this data sheet. Duplication of the data sheet and disclosure to otherpersons are strictly prohibited without our permission.4.We are not responsible for any problems of industrial proprietorship occurring during THC63LVD823 use, exceptfor those directly related to THC63LVD823’s structure, manufacture or functions. THC63LVD823 is designed onthe premise that it should be used for ordinary electronic devices. Therefore, it shall not be used for applications thatrequire extremely high-reliability (space equipment, nuclear control equipment, medical equipment that affects peo-ple’s lives, etc.). In addition, when using THC63LVD823 for traffic signals, safety devices and control/safety unitsin transportation equipment, etc., appropriate measures should be taken.5.We are making the utmost effort to improve the quality and reliability of our products. However, there is a veryslight possibility of failure in semiconductor devices. To avoid damage to social or official organizations, much careshould be taken to provide sufficient redundancy and fail-safe design.6.No radiation-hardened design is incorporated in THC63LVD823.7.Judgment on whether THC63LVD823 comes under strategic products prescribed by the Foreign Exchange and For-eign Trade Control Law is the user’s responsibility. 8.This technical document was provisionally created during development of THC63LVD823, so there is a possibilityof differences between it and the product’s final specifications. When designing circuits using THC63LVD823, besure to refer to the final technical documents.THine Electronics, Inc.Wakamatsu Bldg, 6F3-3-6, Nihombashi-Honcho,Chuo-ku, Tokyo, 103-0023 JapanTel: 81-3-3270-0666Fax: 81-3-3270-0688Copyright 2000-2003 THine Electronics, Inc. All rights reserved 16 THine Electronics, Inc.