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专利名称:CMOS Logic circuit发明人:Hideharu Koike申请号:US06/621085申请日:19840615公开号:US04577124A公开日:19860318
摘要:A CMOS logic circuit has MOSFETs of a first conductivity type in which eachterminal is connected to a corresponding input terminal of the CMOS logic circuit, delayelements are inserted between the input terminals of the CMOS logic circuit and thegates of the MOSFETs of the first conductivity type, an output inverter is insertedbetween the remaining terminals of each of the MOSFETs of the first conductivity typeand the output terminal of the CMOS logic circuit, and in which a MOSFET of a secondconductivity type is inserted between the input terminal of the output inverter and apower source which is controlled by the output from the output inverter.
申请人:KABUSHIKI KAISHA TOSHIBA
代理机构:Finnegan, Henderson, Farabow, Garrett & Dunner
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