MULTI-CHIP PACKAGE AND METHOD OF MANUFACTURING THE

专利名称：MULTI-CHIP PACKAGE AND METHOD OF

MANUFACTURING THE SAME

发明人：Won-Gil HAN,Se-Yeoul Park,Ho-Tae

Jin,Byong-Joo Kim,Yong-Je Lee,Han-Ki Park

申请号：US13618357申请日：20120914

公开号：US20130093080A1公开日：20130418

专利附图：

摘要：A multi-chip package may include a first semiconductor chip, a secondsemiconductor chip, a first stud bump, a first nail head bonding bump, a second stud

bump, and a first conductive wire. The first semiconductor chip may have a first bondingpad. The second semiconductor chip may be stacked on the first semiconductor chip sothe first bonding pad remains exposed. The second semiconductor chip may have asecond bonding pad. The first stud bump may be formed on the first bonding pad. Thefirst nail head bonding bump may be formed on the first stud bump, with one end of afirst conductive wire formed between the two. The second stud bump may be formed onthe second bonding pad, with another end of the first conductive wire formed betweenthe two. An electrical connection test may be performed on each of the wire bondingprocesses.

申请人：Won-Gil HAN,Se-Yeoul Park,Ho-Tae Jin,Byong-Joo Kim,Yong-Je Lee,Han-KiPark

地址：Asan-si KR,Cheonan-si KR,Cheonan-si KR,Asan-si KR,Asan-si KR,Cheonan-si KR

国籍：KR,KR,KR,KR,KR,KR

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