专利内容由知识产权出版社提供
专利名称：WIRING SUBSTRATE, MANUFACTURING
METHOD THEREOF, AND SEMICONDUCTORPACKAGE
发明人：Junichi NAKAMURA,Kazuhiro Kobayashi申请号：US12968405申请日：20101215
公开号：US201101691A1公开日：20110714
专利附图：
摘要：A disclosed wiring substrate includes an insulating layer, a recess formed on asurface of the insulating layer, and an alignment mark formed inside of the recess,
wherein a face of the alignment mark is roughened, recessed from the surface of theinsulating layer, and exposed from the recess.
申请人：Junichi NAKAMURA,Kazuhiro Kobayashi
地址：Nagano JP,Nagano JP
国籍：JP,JP
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